Program

Table of Contents

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Program at a Glance


Time (Hanoi)

Sept. 21

8:30-9:45

Tutorial 1: “RISC-V Computer System Designed for Cyber-Security” Prof. Cong-Kha Pham (UEC Tokyo, Japan)

9:45-10:45

Tutorial 4: “Smart CutTM: Engineered substrate for device performance enhancement,”

Dr. Walter, Soitec, France

10:45-11:05

Coffee break

11:05-11:50

Keynote 5: “Artificial Intelligence Verification-The Future of Chip Verification,”

Nitin Kishore (Truechip Solutions)

11:50-12:30

Lunch

14:00-15:15

Tutorial 3: “State-of-the-Art Techniques for Hardware Security - From Design Methodologies to On-Chip Intelligent Sensors”

Prof. Massimo Alioto, NUS, Singapore

15:15-15:35

Coffee break

15:35-16:35

Tutorial 2: “Marriage of Ferroelectric Memories and BEOL-compatible Oxide Semiconductors to Empower Future Integrated Circuits,”

Prof. Gong Xiao (NUS, Singapore)

16:35-17:35

Tutorial 5: “Agile IC design for Energy-Efficient Sensor Nodes for the Internet of Things,”

Prof. Orazio Aiello, University of Genova, Italy


Sept. 22

7:30-8:30

Registration

8:30-9:00

Opening Session

9:00-9:45

Keynote 1: “Opportunities and Challenges of Emerging Memory in the era of all about data”

Dr. Myung-Hee Na, VP Technology, SK hynix

9:45-10:45

Session R1: 5 papers/58 min

10:45-11:45

Session R2: 5 papers/58 min

11:45-12:15

Q/A for Sessions R1, R2 (8 posters) + Coffee break

12:20-13:20

Lunch

13:30-14:15

Keynote 2: “Robustness of Automotive Embedded System – EMC & ESD From the Technology to the System”

Dr. Patrice Besse, EMC & ESD Director, NXP, France

14:15-15:30

Session R3: 6 papers/75 min

15:30-16:45

Session R4: 6 papers/75 min

16:45-17:15

Q/A for Sessions R3, R4 + Coffee break (8 posters)

17:15-18:25

Session F1: 4 papers/70 min

18:45-21:00

Gala Dinner @ Hyatt Regency West Hanoi hotel (Shuttle bus is available at 18:30)


Sept. 23

8:30-9:15

Keynote 3: “Computer-aided design of materials and devices in the quantum-technology era”

Dr. Félix Beaudoin, Director, NanoAcademic

9:15-10:40

Session F2: 5 papers/85 min

10:40-10:45

Coffee break

10:45-12:20

Session F3: 5 papers/85 min

12:25-13:15

Lunch

13:30-14:15

Keynote 4: “Process developments in advanced image sensor technologies and resulting performance gains in automotive image sensors”

Dr. Thomas Ayers, VP R&D Automotive Sensing, ON Semiconductor Corporation

14:15-15:30

Session R5: 6 papers/75 min

15:30-16:45

Session R6: 6 papers/75 min

16:45-17:15

Q/A for Sessions R5, R6 + Coffee break (8 posters)

17:15-17:25

Closing

17:30-18:00

Committee Meeting

Tutorials

Day 1 (September 21)

Time (Hanoi)

Sept. 21

Virtual?

8:30-9:45

Tutorial 1: “RISC-V Computer System Designed for Cyber-Security,”
Prof. Cong-Kha Pham (UEC Tokyo, Japan)


9:45-10:45

Tutorial 4: “Smart CutTM: Engineered substrate for device performance enhancement,”

Dr. Walter Schwarzenbach, Soitec, France


10:45-11:05

Coffee break


11:05-11:50

Keynote 5: “Artificial Intelligence Verification-The Future of Chip Verification,”

Nitin Kishore (Truechip Solutions)

Chair: Prof. Xuan-Tu Tran (Vietnam National University, Hanoi, Vietnam)


11:50-12:30

Lunch


14:00-15:15

Tutorial 3: “State-of-the-Art Techniques for Hardware Security - From Design Methodologies to On-Chip Intelligent Sensors,”
Prof. Massimo Alioto, NUS, Singapore

Y

15:15-15:35

Coffee break


15:35-16:35

Tutorial 2: “Marriage of Ferroelectric Memories and BEOL-compatible Oxide Semiconductors to Empower Future Integrated Circuits,”
Prof. Gong Xiao (NUS, Singapore)


16:35-17:35

Tutorial 5: “Agile IC design for Energy-Efficient Sensor Nodes for the Internet of Things,”
Prof. Orazio Aiello, University of Genova, Italy

Y

19:00-20:30

Welcome Reception


Technical Program

Day 2 (September 22)


Time (Hanoi)

Sept. 22

Virtual?

7:30-8:30

Registration


8:30-9:00

Opening Session


9:00-9:45

Keynote 1: “Opportunities and Challenges of Emerging Memory in the era of all about data”

Dr. Myung-Hee Na, VP Technology, SK Hynix

Chair: Prof. Xuan-Tu Tran (Vietnam National University, Hanoi, Vietnam)


9:45-10:45

Session R1: 5 papers/58 min

Chair: Koichiro Ishibashi (UEC Tokyo, Japan)


R1.1

(Invited talk 1)

Mobile Ionic Field Effect Transistors with Amorphous Dielectrics: Device Demonstration and Modeling

Huan Liu, Jiajia Chen and Chengji Jin (Zhejiang Lab, China); Yan Liu and Genquan Han (Xidian University, China); Xiao Yu (Zhejiang Lab, China)

Y

R1.2

BEOL-compatible Ta/HZO/W FTJ with low operating voltage targeting for low power application

Leming Jiao, Zuopu Zhou, Zijie Zheng, Yuye Kang, Chen Sun, Qiwen Kong, Xiaolin Wang, Dong Zhang, Gan Liu, Long Liu and Gong Xiao (National University of Singapore, Singapore)


R1.3

Interfacial Layer Engineering to Enhance Endurance and Noise Immunity of FeFETs for IMC Applications

Sourav De (Fraunhofer Institute for Photonic Microsystems & Dresden-Germany, Germany)


R1.4

Systematic Study on Positive Bias Temperature Instability(PBTI) of ZrO2-based Ge nMOSFETs with Inter

Lulu Chou (Xidian University, China); Xiao Yu and Huan Liu (Zhejiang Lab, China); Yan Liu, Genquan Han and Hao Yue (Xidian University, China)

Y

R1.5

Oxygen Vacancy Formation in Charged HfO2: An Ab Initio Study

Wentai Xia, Jifang Cao and Bing Chen (Zhejiang University, China)

Y

10:45-11:45

Session R2: 5 papers/58 min

Chair: Prof. Cong-Kha Pham (UEC Tokyo, Japan)


R2.1 (Invited talk 2)

Enabling Edge-AI with Binarized spiking neural network using STT-MRAMs

Quang Kien Trinh and Van Phuc Hoang (Le Quy Don Technical University, Vietnam)


R2.2

Machine Learning Method for Accurate Analysis of Complicated Low Temperature Random Telegraph Noise

Xinze Li, Yin Sun, Bing Chen and Ran Cheng (Zhejiang University, China); Genquan Han (Xidian University, China); Jing Wan (Fudan University, China)

Y

R2.3

Sub-0.2 pJ/Access Schmitt Trigger Based 1-kb 8T SRAM Implemented Using 40-nm CMOS Process

Shiva Reddy (National Sun Yat-Sen University, Taiwan); Ralph Gerard B. Sangalang (National Sun Yat-Sen University, Taiwan & Batangas State University, Philippines); Chua-Chin Wang (National Sun Yat-Sen University, Taiwan)

Y

R2.4

A Low-Energy 8-bit CLA Realized by Single-Phase ANT Logic

Durga Srikanth Kamarajugadda (National Sun Yat-Sen University, Taiwan); Oliver Lexter July A Jose (Batangas State University, Philippines); L J. Yang (Tamkang University, India); E Balasubramanian (Vel Tech University, India); Sampath Sivaperumal (Presidency University, Bengaluru, India); Chua-Chin Wang (National Sun Yat-Sen University, Taiwan)

Y

R2.5

Optimising Power-Performance in SOI-based Null Convention Logic

Nguyen L Huy (RMIT University Vietnam, Vietnam); Paul L Beckett (RMIT University, Australia)


11:45-12:15

Q/A for Sessions R1, R2 (8 posters) + Coffee break


12:20-13:20

Lunch


13:30-14:15

Keynote 2: “Robustness of Automotive Embedded System – EMC & ESD From the Technology to the System”

Dr. Patrice Besse, EMC & ESD Director, NXP, France

Chair: Prof. Gong Xiao (NUS, Singapore)

Y

14:15-15:30

Session R3: 6 papers/75 min

Chair: Prof. In-Geun Lee (Kyungpook National University)


R3.1

(Invited talk 3)

Beyond 5G: a view from semiconductors materials to systems

Luis ANDIA, SOITEC, France

Y

R3.2

(Invited talk 4)

SOI CMOS technologies for RF and millimeter-wave communication systems

Jean Pierre Raskin, Université Catholique de Louvain, Belgium

Y

R3.3

High-Efficient DC-DC Converter Based on Hybrid SI-SC Topology for Portable Devices

Nguyen Van Trung (Le Quy Don Technical University, Vietnam); Truong Pham (Vietnam Naval Academy, Vietnam); Hong Thu Thi Luu (Institute of Electronics, Vietnam); Linh Thuy Nguyen, Tho Huu Nguyen, Van-Phuc Hoang and Xuan Nam Tran (Le Quy Don Technical University, Vietnam); Van Ha Nguyen (Inje University, Korea (South))


R3.4

Layout-Configurable and Low-Loss Impedance Matching Circuits Built of Slim CMOS Transmission Lines

Hongyu Bao, Yuxin Chu and Sang Lam (Xi'an Jiaotong-Liverpool University, China)

Y

R3.5

A System-on-Chip for IoT Applications with 16-bit Tiny Processor

Kiet Dang and Duy Nguyen (The University of Electro-Communications, Japan); Quynh Nguyen (Danang University of Science and Technology, Vietnam); Trong-Thuc Hoang (The University of Electro-Communications, Japan); Cong-Kha Pham (University of Electro-Communications (UEC), Japan)


R3.6

Novel Field-Plate Integrated Mesa-Type InGaAs/InP Avalanche Photodiode

Xuanqi Chen (National University of Singapore); Jishen Zhang, Haiwen Xu, Rui Shao, Yuxuan Wang, Gerui Zheng and Gong Xiao (National University of Singapore, Singapore)


15:30-16:45

Session R4: 6 papers/75 min

Chair: Prof. Nguyen Ngoc Mai Khanh (University of Tokyo, Japan)


R4.1

(Invited talk 5)

Innovations in Transistor Architecture and Device Connectivity for Advanced Logic Scaling

Anabela Veloso, Geert Eneman and An De Keersgieter (Imec, Belgium); Paola Favia, Andriy Hikavyy and Rongmei Chen (IMEC, Belgium); Anne Jourdain (IMEC & VZW, Belgium); Naoto Horiguchi (Imec, Belgium)

Y

R4.2

(Invited talk 6)

Engineered SiC materials for power technologies

Walter Schwarzenbach (Soitec, France); Severin Rouchier, Guillaume Berre, Romain Boulet, Olivier Ledoux, Enrica Cela, Alexis Drouin, Audrey Chapelle, Sylvain Monnoye, Hugo Biard, Kassem Alassaad, Laurent Viravaux, Nadia Ben Mohamed, Damien Radisson, Gonzalo Picun, Guillaume Lavaitte, Adeline Bouville-Lallart and Jeremy Roi (SOITEC, France); Julie Widiez, Karine Abadie, Emmanuel Rolland, Franck Fournel, Guillaume Gelineau, Frederic Mazen, Alexandre Moulin and Cécile Moulin (CEA Leti, France); Daniel Delprat, Nicolas Daval and Sidoine Odoul (SOITEC, France); Christophe Maleville (Soitec, France); Philippe Sandri (SOITEC LAB, France)


R4.3

TCAD-Based Investigation of the Electrical Characteristics of Normally off p-GaN Passivated GaN HEMT

Yubo Wang (XJTLU, China); Fan Li (University of Liverpool, China); Xuan Chi (XJTLU, China); Wen Liu (Xi'an Jiaotong-Liverpool University, China); Guohao Yu (Suzhou Institute of Nano-Tech and Nano-Bionics, China); Zhongkai Du (Suzhou Powerhouse Electronics Co. Ltd, China); Baoshun Zhang (Suzhou Institute of Nano-Tech and Nano-Bionics, Chinese Academy of Sciences, China)

Y

R4.4

Wide Lock-in Range CDR with Modified DQFD and Coarse-fine Tuning Technique

Tzung-Je Lee, Bo-Hao Liao and Chua-Chin Wang (National Sun Yat-Sen University, Taiwan)

Y

R4.5

Comparing the L&S and L-Band Antenna Low-Noise Amplifiers Designed by Multi-Objective Optimization

Josef Dobeš and Jan Michal (Czech Technical University in Prague, Czech Republic)


R4.6

A Slim Transmission Line Design with Patterned Ground Shields for CMOS mm-Wave Integrated Circuits

Hongyu Bao, Jichun Shi and Sang Lam (Xi'an Jiaotong-Liverpool University, China)

Y

16:45-17:15

Q/A for Sessions R3, R4 + Coffee break (8 posters)


17:15-18:25

Session F1: 4 papers/70 min

Chair: Dr. Wenke Weinreich (Fraunhofer Institute, Dresden, Germany)


F1.1

(Invited talk 7)

From resilience to Resistive Memory variability in Binarized Neural Networks to exploitation of variability in Bayesian Neural Network

Tifenn HIRTZLIN (CEA, France)

Y

F1.2

(Invited talk 8)

Memristor-based neuromorphic computing and beyond

Jianshi Tang (Tsinghua University, China)

Y

F1.3

(Invited talk 9)

Ferroelectric Capacitive Memory for Storage and In-memory Computing

Gong Xiao (NUS, Singapore)


F1.4

(Invited talk 10)

Direct verification of Quasi-Static Negative Capacitance (QSNC) and its applications

Daewoong Kwon (Inha University, Korea)


Day 3 (September 23)


Time (Hanoi)

Sept. 23

Virtual?

8:30-9:15

Keynote 3: “Computer-aided design of materials and devices in the quantum-technology era”

Dr. Félix Beaudoin, Director, NanoAcademic

Chair: Ms. Bich-Yen Nguyen (SOITEC, USA)

Y

9:15-10:40

Session F2: 5 papers/85 min

Chair: Kim, Sanghyeon (KAIST, Korea)


F2.1

(Invited talk 11)

Low power Wake up Receiver for IoT applications

Koichiro Ishibashi (UEC Tokyo, Japan)


F2.2

(Invited talk 12)

Edge Intelligence for IoT Wearable Sensors

Deepu John (University College Dublin, Ireland)

Y

F2.3

(Invited talk 13)

140-GHz Energy-Efficient OOK Receiver using Self-Mixer-Based Power Detector in 65nm CMOS

Nguyen Ngoc Mai Khanh (University of Tokyo, Japan)


F2.4

(Invited talk 14)

Configurable Intelligent Power management IC Solutions

Harry Trinh (Qrovo Vietnam)


F2.5

(Invited talk15)

Novel Tunnel- and Ferroelectric-based Devices by Mechanism Engineering for Ultra-Low Power Applications

Qianqian Huang (Peking University, China)

Y

10:40-10:45

Coffee break


10:45-12:20

Session F3: 5 papers/85 min

Chair: Dr. Guillaume Besnard (Soitec, France)


F3.1

(Invited talk 16)

3-Dimensional Integration with High Interconnection Density

Rino Choi (Inha, Korea (South))


F3.2

(Invited talk 17)

Smart Cut Technology: From Substrate Engineering to Advanced 3D Integration

Guillaume Besnard (Soitec, France); Bich-Yen Nguyen (SOITEC, USA); Christophe Maleville (Soitec, France)


F3.3

(Invited talk 18)

Monolithic 3D III-V HEMT for future communication and quantum computing

Sanghyeon Kim (KAIST, Korea)


F3.4

(Invited talk 19)

Enablement of CMOS integrated sensor, harvesting and storage applications by ferroelectric HfO2

Wenke Weinreich, Malte Czernohorsky and Maximilian Lederer (Fraunhofer IPMS, Germany)


F3.5

(Invited talk 20)

Device engineering guidelines for performance boost in IGZO front gated TFTs based on defect control

Subhali Subhechha, Nouredine Rassoul, Attilio Belmonte, Hubert Hody, Harold Dekkers and Michiel van Setten (IMEC, Belgium); Adrian Chasin (Imec, Belgium); Shamin Houshmand Sharifi, Kaustuv Banerjee, Harinarayanan Puliyalil, Shreya Kundu and Murat Pak (IMEC, Belgium); Diana Tsvetanova (Imec, Belgium); Nina Bazzazian, Kevin Vandersmissen, Dmitry Batuk, Jef Geypen, Jeroen Heijlen and Romain Delhougne (IMEC, Belgium); Gouri Kar (Imec, Belgium)

Y

12:25-13:15

Lunch


13:30-14:15

Keynote 4: “Process developments in advanced image sensor technologies and resulting performance gains in automotive image sensors”

Dr. Thomas Ayers, VP R&D Automotive Sensing, ON Semiconductor Corporation

Chair: Prof. Van Phuc Hoang (Le Quy Don Technical University, Vietnam)


14:15-15:30

Session R5: 6 papers/75 min

Chair: Rino Choi (Inha, Korea (South))


R5.1

(Invited talk 21)

GaN-on-Si Microwave and mm-Wave Devices

Zhihong Liu (Xidian University, China)

Y

R5.2

(Invited talk 22)

High performace RF devices in an advanced FDSOI process enabling integrated Watt-level power amplifiers for WiFi applications

Viet T. Dinh (NXP Semiconductors, USA)

Y

R5.3

Investigation of normally-OFF AlGaN/GaN MIS-HEMTs with Al2O3/ZrOx/Al2O3 charge trapping layer

Jiachen Duan (XJTLU, China); Yuanlei Zhang (University of Liverpool, China); Ye Liang (University of Liverpool & XJTLU, China); Yutao Cai (XJTLU, China); Wen Liu (Xi'an Jiaotong-Liverpool University, China)

Y

R5.4

GAQ-SNN: A Genetic Algorithm based Quantization Framework for Deep Spiking Neural Networks

Duy-Anh Nguyen (VNU University of Engineering and Technology, Vietnam); Xuan-Tu Tran (VIetnam National University, Hanoi, Vietnam); Francesca Iacopi (University of Technology Sydney, Vietnam)


R5.5

A Novel In-memory Matching Circuit Based on Non-volatile Resistive Memory

Quang-Kien Trinh, Quang-Manh Duong, Xuan-Tien Do, Van-Phuc Hoang and Hoang-Gia Vu (Le Quy Don Technical University, Vietnam); Van-Ngoc Dinh (Institute of Information Technology, Vietnam); Xuan-Uoc Dao (Le Quy Don Technical University, Vietnam)


R5.6

Modeling and Simulation of MEMS-Based Piezoelectric Energy Harvester

Dao Ngoc Tuan (Vietnam - Korea University of Information and Communication Technology, Vietnam); Le Phuoc Thanh Quang (The University of Danang, Vietnam); Phuc Than (Vietnam - Korea University of Information and Communication Technology, Vietnam); Tran The Son (Korea - Vietnam Friendship IT College & Vietnam - Korea University, Vietnam); Anh Quang Vu Nguyen (Vietnam-Korea University of Information and Communication Technology, Vietnam); Hoang Huu Duc (Viet Nam - Korea University of Information and Technology, Vietnam)


15:30-16:45

Session R6: 6 papers/75 min

Chair: Prof. Daewoong Kwon (Inha University, Korea)


R6.1

(Invited talk 23)

3-levels-stacked InxGa1-xAs Multi-Bridge Channel Field-Effect-Transistors

In-Geun Lee (Kyungpook National University, Korea)


R6.2

(Invited talk 24)

Integration of InGaAs HEMTs with Si CMOS for energy efficient hybrid circuits

Annie Kumar (National University of Singapore)

Y

R6.3

FBW-SNN: A Fully Binarized Weights-Spiking Neural Networks for Edge-AI Applications

Van-Ngoc Dinh (Institute of Information Technology, Vietnam); Ngoc-My Bui (AMST, Vietnam); Van-Tinh Nguyen, Quang-Kien Trinh and Manh Duong Quang (Le Quy Don Technical University, Vietnam)


R6.4

High-speed FPGA-based Design and Implementation of Text Search Processor

Binh Kieu-Do-Nguyen, Kiet Dang and Trong-Thuc Hoang (The University of Electro-Communications, Japan); Katsumi Inoue, Toshinori Usugi, Masanori Odaka and Shuichi Kameyama (Advanced Original Technologies Co., Ltd., Japan); Cong-Kha Pham (University of Electro-Communications (UEC), Japan)


R6.5

An Adaptive Hardware Architecture using Quantized HOG Features for Object Detection

Nguyen Ngo Doanh (Information Technology Institute, Vietnam National University, Hanoi, Vietnam); Duy-Hieu Bui (Vietnam National University, Hanoi, Vietnam); Fawnziu Azmadi Hussin (Universiti Teknologi Petronas, Malaysia); Xuan-Tu Tran (VIetnam National University, Hanoi, Vietnam)


R6.6

An experimental study on UV OLED and OTFT for road line tracking

Toan Dao (University of Transport and Communications, Vietnam)


16:45-17:15

Q/A for Sessions R5, R6 + Coffee break (8 posters)


17:15-17:25

Closing


17:30-18:00

Committee Meeting




Note: Each invited talk has 17 minutes (14 minutes for the presentation and 3 minutes for Q/A)

Each regular talk has 10 minutes for the presentation and a Q/A session with poster